problem
Kada probam da kompajliram sounter.vhd dobijam sledece greske :
Error: COMP96_0071: counter.vhd : (23, 12): Operator "<" is not defined for such operands.
Error: COMP96_0104: counter.vhd : (23, 12): Undefined type of expression.
Error: COMP96_0071: counter.vhd : (24, 17): Operator "+" is not defined for such operands.
Error: COMP96_0104: counter.vhd : (24, 17): Undefined type of expression.
Compile failure 4 Errors 0 Warnings Analysis time : 0.1 [s]
O cemu se radi?
Pozdrav,
Nikola
library IEEE;
use IEEE.std_logic_1164.all;
entity COUNTER is
port (
CLK: in STD_LOGIC;
Q: out STD_LOGIC_VECTOR (3 downto 0);
RESET: in STD_LOGIC
);
end COUNTER;
architecture COUNTER of COUNTER is
begin
process (CLK, RESET)
variable Qint: STD_LOGIC_VECTOR (3 downto 0);
begin
if RESET='1' then
Qint := "0000";
else
if CLK'event and CLK='1' then
if Qint<9 then
Qint:=Qint+1;
else
Qint:="0000";
end if;
end if;
end if;
Q <= Qint;
end process;
end COUNTER;
Error: COMP96_0071: counter.vhd : (23, 12): Operator "<" is not defined for such operands.
Error: COMP96_0104: counter.vhd : (23, 12): Undefined type of expression.
Error: COMP96_0071: counter.vhd : (24, 17): Operator "+" is not defined for such operands.
Error: COMP96_0104: counter.vhd : (24, 17): Undefined type of expression.
Compile failure 4 Errors 0 Warnings Analysis time : 0.1 [s]
O cemu se radi?
Pozdrav,
Nikola
library IEEE;
use IEEE.std_logic_1164.all;
entity COUNTER is
port (
CLK: in STD_LOGIC;
Q: out STD_LOGIC_VECTOR (3 downto 0);
RESET: in STD_LOGIC
);
end COUNTER;
architecture COUNTER of COUNTER is
begin
process (CLK, RESET)
variable Qint: STD_LOGIC_VECTOR (3 downto 0);
begin
if RESET='1' then
Qint := "0000";
else
if CLK'event and CLK='1' then
if Qint<9 then
Qint:=Qint+1;
else
Qint:="0000";
end if;
end if;
end if;
Q <= Qint;
end process;
end COUNTER;
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