[vlsi-nastava:2004] - domaci by "Nikola Sivacki" <nsivacki@InfoSky.Net>

Imam problem sa sintetizatorom :

@W:"D:\VHDL\Counter8254\src\controllogic.vhd":66:1:66:2|Feedback mux
created for signal m_dec. Did you forget the set/reset assignment for
this signal?
@E:"D:\VHDL\Counter8254\src\controllogic.vhd":66:1:66:2|Can't find
control signal for m_dec

E sada, imam reset za taj signal, ali ga unutar jednog procesa menjam i
asinhrono(u resetu) i sinhrono. Koliko sam cuo ovo bi mogao biti
problem, ali ne uspevam to nikako da resim, jer kada reset odvojim u
poseban proces dobijem vrednosti 'X' za taj signal umesto '1'....? 


Pozdrav,
Nikola