[vlsi-nastava:2009] - Ne radi MDR by Nemanja Ilic <nemanja.ilic.81@gmail.com>

Zdravo svima,

Kada sam jos ranije napravio mdr i testirao ga radio je kako treba. 
Medjutim, sada kada je uklopljen u procesor ne radi.
Sledece stvari su u pitanju. Kada na ulaz MDR-a dodje nesto to se 
automatski izbaci na izlaz (OD) iako je signal koji vodi trostaticki 
bafer na nuli.
Takodje, kada je signal koji vodi trostaticki bafer (OI) na jedinici 
nista se ne izbacuje na izlaz.

Svaka pomoc je dobrodosla.

PS Sada svaki if ima svoj else

library ieee ;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.std_match;

entity MDR is
   generic (n: natural := 16);
  
   port
   (
       clk        : in std_logic;
       ld        : in std_logic;
       II        : in std_logic_vector(n-1 downto 0);    -- input lines 
from internal bus
       ID        : in std_logic_vector(n-1 downto 0);    -- intut lines 
from data bus
       mx        : in std_logic;
       OI        : out std_logic_vector(n-1 downto 0);    -- output to 
internal bus
       OD        : out std_logic_vector(n-1 downto 0);    -- output to 
data bus
       en_I    : in std_logic;                -- enable tristate driver 
to internal bus
       en_D    : in std_logic                -- enable tristate driver 
to data bus
   );
end entity;

architecture behaviour of MDR is
   signal O_tmp : std_logic_vector(n-1 downto 0);
   --signal I_tmp : std_logic_vector(n-1 downto 0);

begin
   mdr: process (clk)
   begin
       -- wait on clk's rising edge
       if (clk'event and std_match(clk, '1')) then
           if (std_match(ld, '1')) then
               case mx is
                   when '0' =>    O_tmp <= II;
                   when '1' =>    O_tmp <= ID;
                   when others =>    O_tmp <= (O_tmp'range => 'Z');
               end case;
               --if (std_match(ld, '1')) then
                   --O_tmp(n-1 downto 0) <= I_tmp;
               --end if;
           else
               O_tmp <= O_tmp;
           end if;
           -- tristate drivers
           if (std_match(en_I, '1')) then
               OI <= O_tmp;
           else
               OI <= (OI'range => 'Z');
           end if;
           if (std_match(en_D, '1')) then
               OD <= O_tmp;
           else
               OD <= (OD'range => 'Z');
           end if;
       else
           O_tmp <= O_tmp;
       end if;
   end process;

end architecture;